VHDL design

VHDL is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays (FPGAs) and integrated circuits. It is not bound to a vendor. It is a standard. VHDL is a fairly general-purpose language, and it doesn't require a simulator on which to run the code. There are many VHDL compilers, which build executable binaries (Xilinx ISE, and Altera Quartus II, among others). It can read and write files on the host computer, so a VHDL program can be written that generates another VHDL program to be incorporated in the design being developed.

The slide shows an example of VHDL code.

Image courtesy of Avnet Inc. (USA)

More information at: vhdl_speedway_f07_9_2_2_0.pdf